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LRect's avatar
LRect
Icon for New Contributor rankNew Contributor
7 years ago
Solved

(VHDL) I'm Receiving an Error When Trying to Access an Array

Hello All, I'm trying to output data inside an array to the 7-segment display on my DE1-SoC board. Here are my variables: display : out std_logic_vector (6 downto 0); type bigDisplay is array (0 ...
  • Abe's avatar
    Abe
    7 years ago

    You can use the following to convert bit_vectors/ bit to std_logic_vector:

    Use IEEE.STD_LOGIC_1164 package's function To_StdLogicVector

    FUNCTION To_StdLogicVector ( b : BIT_VECTOR ) RETURN std_logic_vector;

Pvand1's avatar
Pvand1
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

Alternatevely you might use:

Type sevseg_t is std_logic_vector(6 downto 0);
signal sevseg is array(0 to 4) of sevseg_t;

And then you can directly use the returned value of the array.

Also try using std_logic instead of bit asit helps to spot potential problems when simulating your design.