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Altera_Forum's avatar
Altera_Forum
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15 years ago

VHDL global signals

Hi I'm somewhat confused in what way quartus supports global signals. We prototype our ASIC on a Stratix III and need some things connected to pins that on the ASIC are not. For this I def...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I'm not aware of Quartus support for globals signals (signals declared in packages). The "bidir pin" point sounds strange, can you give an example how you achieved this?

You can specify the pins as virtual either by the assignment editor or in the VHDL text: 

attribute altera_attribute : string;
attribute altera_attribute of virt_in: signal is "-name VIRTUAL_PIN ON";