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Altera_Forum's avatar
Altera_Forum
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8 years ago

VHDL code P2, Is anybody who can help me ?

Hi guys, I have some code for this "project" (photo). I have no idea hot to pair this. Can You help me with port map and signals ? This code is correct ? library IEEE; use IEEE.STD_LOGIC_1164....
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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You appear to be missing all the port maps, plus I assume a copy paste error as the code is a little odd (there is a begin after the end)

Please re-post correct code and state what problems you're having

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I replicated only code for T flip-flop. Succession is not important bcs i know hot to sort this code. I don't know how to attribute signals and where they must be. Any suggestions?