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Altera_Forum
Honored Contributor
9 years agoVHDL 2008: Error (10500) in conditional assignment
According to my understanding VHDL-2008 should allow conditional assignment as a sequential statement, that is in clocked processes. However I get a syntax error 10500 in the below code fragment. Is ...
Altera_Forum
Honored Contributor
9 years agoThanks for the reminder but my understanding was that PORT_INIT is a constant and the comparision PORT_INIT(I) = 'Z' is therefore valid. Am I mistaken?