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Honored Contributor

13 years ago

Very slow clock signals and STA in TimeQuest

For some specific usage, I need some very slow clock signals. They are generated from FPGA for outside chip. For example, the FPGA clock is 40Mhz, so clock period is 25ns and I named this cloc...

Altera_Forum

Honored Contributor

13 years ago

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Yep, check out http://www.altera.com/literature/hb/cyclone-iv/cyiv-51005.pdf

and http://www.altera.com/literature/hb/cyclone-iv/cyiv-51005.pdf

C4's clocking with altclkctrls is limited to only globals or external paths.

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Thanks so much. I will post here again if I have further question.

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Very slow clock signals and STA in TimeQuest

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