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Altera_Forum
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13 years ago

Very slow clock signals and STA in TimeQuest

For some specific usage, I need some very slow clock signals. They are generated from FPGA for outside chip. For example, the FPGA clock is 40Mhz, so clock period is 25ns and I named this cloc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

I think you'll be okay with the counter. Just make sure it's a synchronous counter and not a ripple counter. As mentioned, if you're concerned about clock skew for nodes you are driving with this clock, you can put it on a Global buffer. If it has a lot of loads on it, the Fitter will likely auto-promote it to a Global anyway. If not, you can manually add it.