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Altera_Forum's avatar
Altera_Forum
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16 years ago

Very different simulation results of a simple counter

Hello I'm in my third year bachelor electronics and i'm making a project in vhdl. In this project there is a simple counter that should start counting at zero. The counter has 4 selection outpu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Also, because you've set the asynch reset to be a version of itself, its unlikely to reset itself properly as I guess it wont hold the reset value long enough. Just use a synchronous reset instead: 


if (C'event and C='1') then 
  if tmp = "1000" then
    tmp <= "0000";               
  else
    tmp <= tmp + 1;
  end if;
          end if;