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You need the .qpf and qsf files.
What IPs are you talking about? any standard megafunctions (fifos, memories etc) you only need the wrapper HDL file, as this just calls the standard altera libraries.
For any other IP, generally you would check in any HDL files generated, plus any TCL files it may have generated (which are usually just file lists to save you having to include all the HDL files manually in your project).
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Thanks for reply. So:
1. .qpf and qsf files are for project, correct?
2. So for IPs (no matter standard megafunctions or other IPs), the files I need to check are HDL files and tcl files? My questions are if I only check these HDLs and tcl files, after I rebuilt the project, includes all these files, how can I reconfigure these IPs if needed?
3. Is there a IP file that Quartus can regenerate the IP with same configuration based on this IP file? The reason I ask this since I used Xilinx FPGA for a while and come back to Altera FPGA for the current project. For IPs from Xilinx, there is a .xsi file that I can check in and Xilinx IDE can use this file to regenerate the IPs with same configuration as I did before. I wonder whether Altera has the similar mechanism.
Thanks.
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