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11 years ago --- Quote Start --- http://www.altera.com/literature/hb/qts/qts_qii51007.pdf See page 8. --- Quote End --- I use similar to the code shown below. When I try to fit my design into different device it shows that number of block memory bits used is 0 !!! what should i do to make it recognize the ROM! module sync_rom (clock, address, data_out); input clock; input [7:0] address; output [5:0] data_out; reg [5:0] data_out; always @ (posedge clock) begin case (address) 8'b00000000: data_out = 6'b101111; 8'b00000001: data_out = 6'b110110; ... 8'b11111110: data_out = 6'b000001; 8'b11111111: data_out = 6'b101010; endcase end endmodule