verilog 'default' value in quartus throws Err10818

The code doesn't look like a double edge triggered (that is however not synthesizable).

You only have the posedge wb_rst_i in the sensitivity list (for a double edge you should have "posedge ... or negedge ...").

Did you try as I said?

My idea is:

always @(every signal on the right side of the assignments) aout_comb <= 0; if (wb_rst_i) begin if (...) begin if (...) begin aout <= 1; end else begin ... end ... end ... end elseif (...) begin ... aout_comb <= 1; ... end

always @(posedge wb_rst_i)

begin

aout <= aout_comb;

end