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Altera_Forum's avatar
Altera_Forum
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9 years ago

Verilog coding

Hi all, I am just start to learn Verilog and immediately had a problem - please take a look at code - why "repeat (10) does not working? I was expected a 5 pulse train at every oop pulse - ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

If you're trying to simulate this, you need to have an input stimulus for oop to make it work at all. Otherwise, pls will just stay low. And as Tricky mentioned, the repeat construct is not synthesizable if you're trying to make this work in hardware.