Altera_Forum
Honored Contributor
13 years agoverilog code
i need verilog code for array multiplier using for loop.
i wish to reduce program length to wirte coding.so please send the same..i need verilog code for array multiplier using for loop.
i wish to reduce program length to wirte coding.so please send the same..why cant you write it yourself?
Quartus II has templates for things like these. With your verilog file opened in Quartus go to the edit menu --> templates and find the multiplication template under the verilog templates.
i dont have knowleadge about for loop concept in verilog.
i have only in data flow modeling it take more time to instantiation every model.common mistake that people always make when they are moving into programmable logic, they always thought writing RTL codes is similar to writing software codes.
You can find it here: fpga4fun.com though I would recommend you trying to implement it by yourself first.