verilog code stuck

It does not need much work. All you have to do is have the counter 8 bits more wide. then add/subtract 51 as any accumulator (ofcourse taking care of any overflow). When you read the result out then read accumulator output discarding its 8 LSBs (this is equivalent to divide by 256, don't worry about shift).

As such the result will be integer 1 ~ max but the increment/decrement implied is +/- 0.2

With this representation, you are not outputing fractions but only integers.

If you want fractions to stay then you can keep the 8 LSBs. it is then up to to the output device to interpret these 8 bits as fraction.

It will help to know what do you do with the final count value...