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Altera_Forum
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13 years ago

Verilog code for bram

Hi, I need to implement multi-port memories for stratix series for my thesis work. If anybody could suggest/give sample verilog codes to implement bram it will be of great help to me. I am havi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Daixiwen , as you said we do not need the altera_mf.v file in the project. I could compile it successfully :)