Verilog code for bram

You have two choices[list][*]Use the megawizard to implement your memory block (in the Tools menu). It can create a Verilog block that instantiates Altera primitives. You can configure a lot of options but the generated code will only work with Quartus[*]make a table that will be recognized as a memory block by the synthesizer. It is a bit harder to code, but it is more portable and should also work with other tools from other FPGA manufacturers. Have a look at pages 13-13 and over of this document (http://www.altera.com/literature/hb/qts/qts_qii51007.pdf) to see how you can write your code to have it recognized as a memory block.[/list]