Altera_ForumHonored Contributor12 years agoverilog code about shift phase 0, 90, 180, 270 I have 4 signals come high at the same time and also go low at the same. Now I want to shift the 2nd, 3rd, and 4th signals out to 90, 180, and 270 degree. Does anybody has any good pointers or how ...Show More
Altera_ForumHonored Contributor12 years agoFvM, Do you have any sample in Verilog? I like the offset added to the counter.
Recent DiscussionsTiming analysis - long combinational pathDocker image for Quartus Pro 26.1 missing ?Error (292014): Can't find valid feature line for core SLL_CA_HBC_T001_Hyperbus_Memory_Controller_10Agilex 5 – Critical HSSI Error in JESD204B Example DesignThe quartus license works with version 25.0 but not with version 17.0