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Your second design implements a variable bit enable mask (bena) and puts it into the below line
ram <= (wmask & wdata) | (~wmask & ram);
Bit enable is clearly beyond the ram block features and thus can't be inferred. I'm also not sure if Quartus may be able to understand the construct without bit enables, but I won't exclude it.
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True, although it would be possible for a synthesizer to recognize that each group of 8 bit enables is just a fanned out byte enable. I would be surprised if Quartus were that smart.
However, what the synthesizer actually complains about is the appearance of ram[addr] in a combinatorial expression, since the ram block does not support an unregistered read. It does not recognize that the entire expression is just describing the behavior of the RAM, and actually tries to map this as an external path.
So, the question is, is there a different way to express this which Quartus can understand and that also has working parameters? I recognize the answer may simply be "no", but I'm asking anyway just in case anyone has some ideas.
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