Hi Alex,
Yes, I am using NIOS. I think my nios code executes from the on chip ram/rom (as I said, I was following the Altera tutorial). But I'm not too sure if I'm right (I'm quite new to quartus, verilog and anything to do with an FPGA). I've attached a screenshot of the Qsys page. If I am using the onchip ram/rom, how do I write this data to it?
My project basically is to use the parallel ports of the DDS to modulate phase. But before that I have to write data to some of the registers on the DDS. This can only be done using SPI. The first 8 bits will be the address of the data register to address and the next 40 bits will be the data itself. After I have sent this information, I don't need to use the SPI anymore and will switch to the parallel mode communication. So basically I need SPI only to initialize the parameters on the DDS. I hope this helps. And once again, thanks!