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Altera_Forum's avatar
Altera_Forum
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12 years ago

Using M9K as shift register on a Cyclone IV

Hello, i have something like this: 

if sync = '1' then
        freq_vector(31) <= freq_in;
        for i in 0 to 30 loop
          freq_vector(i) <= freq_vector(i+1);
        end loop;
      end if;

and i would to use a m9k for this shift register functionality, how can i do it?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    Think about how the shift register is implemented in an M9K block.

    No data is moved, the addresses of the memory locations change instead.

    In it simplest form this means that you can only see two delayed values (there are 2 read ports).

    More read ports can only be generated by chaining or replicating the shift register.

    --- Quote End ---

    That's perfect dsl but why this isn't being sinthesised as a m9k shift register? It's set to recognize shift registers in the Quartus II settings 

    if sync = '1' then
        freq_vector((5*16)-1) <= freq_in;
        for i in 0 to ((5*16)-2) loop
          freq_vector(i) <= freq_vector(i+1);
        end loop;
      end if;