Using HLS to target the FPGA from the Host(PowerPC)

​You can use either HLS or Open Cl. Open CL are mostly target for software engineer while HLS are target for hardware engineers.

You refer to https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/hls-compiler.html

https://www.intel.com/content/www/us/en/software/programmable/sdk-for-opencl/overview.html

Thanks

It would probably be easier to use OpenCL in your case since the PCI-E and DDR IP cores are pre-configured and provided in the BSP and a PCI-E driver is also provided to allow communication between the host and the FPGA. Furthermore, controlling interactions between the host and the FPGA is relatively easy using the basic functions provided by the OpenCL standard. With HLS, however, you can only compile parts of your C code into an HDL module, and then you will have to manually insert it into a complete HDL projects with all interfaces created/instantiated and managed by you.

Hi!

Thanks for the reply. I am using Serial Rapid IO as interface. So I cannot use the PCI-E IP cores.