Using both edges of a clock

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I don't think an explicit global assigment is the solution to the root of the problem. Quartus normally won't promote a clock just to some registers.

You should investigate what is causing this. Check Quartus compiler warnings, fix all those unconstrained clocks, run the assistant for correct synchronous design, etc.

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Just did a compile with all the clocks set to global explicitly and the timing violation was gone. But it may take a few compilation to find out if this problem is indeed gone.

Thanks again.