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Altera_Forum's avatar
Altera_Forum
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16 years ago

Use “don’t care” statement in vhdl code

I will use don’t care statements in my vhdl code. Quartus 2 have more degree of freedom to reduce logic. Example: Case aaa IS When 1 => bbb <= 1; When 2 => bbb <= 2...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

try it and see. Likelyhood is that it will stick them all to '0' or '1'.

Also be carefully with dont cares. elsewhere in the code, if you evaluate b, if you did something like this:

if b(0) = '1' then....

Then if b(0) is set to '-' then the evaluation of the expresion is false.