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Altera_Forum's avatar
Altera_Forum
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12 years ago

Urgent VHDL Comparator

Can some one please tell me whats wrong with my code (check attached document). I'm designing a comparator to compare two input bit (A and B). But input B is supposed to be a reference with a fixed...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Exactly, that's where the problem lies, setting the gain... i have been experiencing logical error when the program is loaded into the device, because all the output goes high. Pls Daixiwen, can u go through my design description and corresponding code and direct me as to what to do.

Also i adjusted the instant of my comparator that is GENERIC MAP (WIDTH => 8192) but the output still went HIGH.

ATTACHED ARE SOME DOC

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And I forgot to answer the other part of your problem.... if you need a fixed reference, then you should remove B from the ports list and make it a generic instead. That way you can even change the threshold each time you instantiate your comparator.

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