Urgent VHDL Comparator

Thank u so much for your time. I had done exactly what u said still gave error (attached doc), but i still like to link "data" to "B" because B is what my test bench recognized.

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hi,

Delete the line "B = data;" : no sense and must generate an error because B is an INput.

Be carefull : A and B are std_logic_vectors. SIGNED or UNSIGNED, we don't know, BUT you specify use std.ieee_logic_unsigned.all.

as a result a and b are treated as unsigned.

I belive that IEEE.STD_LOGIC_UNSIGNED is NOT a IEEE standard.

You want to compare with "data", then you should have written "IF A < data THEN ..."

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