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Altera_Forum
Honored Contributor
13 years agoYes it is still open.
Aim of the project is: =============== To develop modulation and demodulation code in vhdl for BPSK where bit rate is 1200 fixed, using following tools Stratix III 3SL150 board QuartusII version 9.1 1. How much time you will take for this? 2. One developer is in india. Would you be able to coordinate with him after her 6 PM time (which is 7 AM to 11 AM MST in the USA) 3. Payment is only upon successful execution. Objectives/expectation will be given to you from beginning. 4. What is your budget expectation? Thanks ...