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Altera_Forum
Honored Contributor
8 years agoUnivercity program VWF simulation error
I try to simulate Generic parity detector example in the book Circuit Design with VHDL. (Velnei A. Pedroni). But, simulation waveform editor gives an error. My synthesis editor is Quartus 2 web editi...
Altera_Forum
Honored Contributor
8 years agoYes I can run analysis & synthesis without any error. But I want to simulate it. This error occur.