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Altera_Forum's avatar
Altera_Forum
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7 years ago

Univercity program VWF simulation error

I try to simulate Generic parity detector example in the book Circuit Design with VHDL. (Velnei A. Pedroni). But, simulation waveform editor gives an error. My synthesis editor is Quartus 2 web editi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Hi,

Have you run analysis & synthesis without any error?

Can you elaborate on steps you have followed?

I was able to run the simulation without any error.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)