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It may be sufficient.
In the case of your code, when reset = '1', then the coeffs registers *hold* their value.
Quartus is implementing it as a clock enable for the coeffs registers.
I'm surprised it's hurting you but that seems to be cause of of the path between R and M.
Either reset your coeffs register or put them in a different process, without reset.
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Thanks rbugalho.
That makes sense indeed since it means if reset = '0' then enable coeffs on every clock edge otherwise hold at last value. While my intention is not that at all. I don't want to apply reset to coeffs in any way but then the code as such broke the classic template and implied enable.
I will use a separate process. I was following the advice that says apply reset to control signals only as data reset is useless usually and is burden on timing but here you go it does need separate process. It does hurt speed a lot when you are runnning at ~370MHz with 80% of chip used.
Thanks
P King
Honored Contributor
