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Altera_Forum's avatar
Altera_Forum
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16 years ago

Undeclared Parameter & Bus Range Problem

hi there, i have another problem with a VHDL Code. After including the VHDL in the project and generating a symbol, which i dropped on a bdf file, i want to start the analysis and elaborat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks Tricky for your reply!

I've attached a photo for better understanding.

As you can see this box with the parameter and its values is "on" so the values are set.

Do you've got any other idea?

Thanks alot!

elec