Forum Discussion
Altera_Forum
Honored Contributor
12 years agoHi KxAlpha,
great, I finally understand (perhaps) understanded the basics of inputs / outputs constraints, which i must describe, how you write. Yes, it is sad, that is no GUI based wizard. Before Altera FPGA i use Xilinx FPGA and in every .ucf (something like .qsf nad .sdc file in one) has from Project wizard text example, how to set clock paths, input/output paths, pin alocation, ignored paths etc. ... like remark and one neednt read some tutorial or pdf notes. Is possible download this training curses on local disk ? Or save like pdf document ? Thank you. Jan