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Altera_Forum's avatar
Altera_Forum
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11 years ago

Unconstrained input and output

Hi,

I begin today with Deo-Nano and FPGA. It's nice and very very different approach from C# and Visual Studio :):)

Then, my Deo-Nano begin to work well with Quartus II. I have CLK_50 input and a pin on output then my scope is 50MHz, nice :p. I have these messages, see the capture.

http://www.alteraforum.com/forum/attachment.php?attachmentid=11397&stc=1

Thanks for your help

Jennifer

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hi,

    Not sure if it is my problem, I could not view the attached screenshot. Mind re-attach?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    I am not able to view the capture too. By the way, seems like your design is working as you can get 50MHz at scope. Is this not your target implementation?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hi,

    Maybe you can post the warning messages (if error, then your design should not have worked) here and elaborate your concern.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hi,

    My project works, it haven't error. But why this warnings ? I have for all projects.

    Best regards

    Jennifer
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Mind posting the messages to the thread? Since your project works, I believe the warnings can be ignored.