Forum Discussion
Hi,
above youtube link helped me but the problem with DDR simulation still same. I was trying create new project in modelsim and run simulation after adding relevant libraries but I am getting same error both the way i.e. Nativelink or modelsim.
vsim -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L fiftyfivenm -L fiftyfivenm_ver -L rtl_work -L work -L ddr_module -L DDR_Data -voptargs=\"+acc\" -t 1ps work.t2
# vsim -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L fiftyfivenm -L fiftyfivenm_ver -L rtl_work -L work -L ddr_module -L DDR_Data -voptargs=\"+acc\" -t 1ps work.t2
# Loading std.standard
# Loading std.textio(body)
# Loading ieee.std_logic_1164(body)
# Loading ieee.std_logic_arith(body)
# Loading work.t2(simltn)
# Loading work.test2(behaviour)
# Loading ieee.numeric_std(body)
# Loading work.ddr_module(rtl)
# ** Error: (vsim-19) Failed to access library 'fiftyfivenm' at "fiftyfivenm".
#
# No such file or directory. (errno = ENOENT)
# ** Error: (vsim-19) Failed to access library 'fiftyfivenm_ver' at "fiftyfivenm_ver".
#
# No such file or directory. (errno = ENOENT)
I tried in VHDL coding and just added one IP i.e DDR and have done simulation and above error it occurred.
Thanks