Forum Discussion
AKuma235
New Contributor
6 years agoBefore giving simulation command on my testbench, I am adding all Verilog library i.e altera_ver, altera_mf_ver, altera_insim_ver and max_ver ;
It is showing error of "fiftyfivenm_ff failed".
I am using GUI for simulation and adding library into library option of pop up window for simulation.
Thanks