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Altera_Forum
Honored Contributor
Honored ContributorUART issue
Greetings everyone, I'm working on an UART design (only the receiver), I followed an online pdf wich deals with the subject. I ended up with this following code :
library ieee;
use ieee....
Altera_ForumHonored Contributor
Honored ContributorThis will be because rx_done_tick is an asynchronous signal. There will be a signel somewhere that changes slightly before the clock edge causing a glitch. This are a characteristic of asynchronous outputs. Its difficult to tell exactly what because you didnt provide a test bench and your image is too low a resolution.
The solutiuon would be to make all of the code synchronous - put it all in a synchronous process, and no glitches can be produced
