type conversion functions

The timer signal definition is missing from your post. I wonder, why you used integer instead of unsigned for counter?

The bit inversion has to do neither with conversion function nor integer type but is normal operation of the VHDL compiler. The simulator is using the real signal polarity of synthesized logic in timing simulation. You have to check the logic functional behaviour, ignoring such implementation details. However, if you expose a signal to external pins, it will have correct polarity.