Two different build merges as one

Question

I am working on a project to combine two FPGAs into one. One FPGA design is by an external vendor. The vendor cannot provide project source files except pinouts. Their design has NIOS and SDK embedded software. Both of us are using the same FPGA. Resource-wise, both designs can be combined into one FPGA of the same part number.

My design is using HPS. Both the HPS and NIOS need to communicate. Altera Pro allows NIOS and HPS connected via AXI bus in Platform Designer. All examples are showing within one Qsys file how to do this. But here we have two different projects.

Is it possible to incorporate their project output files into my project and build an image? What file types and format I should ask the other vendor to provide? How do you merge the design within Altera Pro Ed build environment (GUI or through script)?

bill_altera · Answer

This is actually two different questions. The first is how to share IP without sharing source files. The second is how to communicate between the HPS and a Nios. I'll address the first and let someone else address the second.

There are two methods for the vendor to share their design. The first is using partitions and exporting a partition netlist. You can find more information at the following URLs:

How can I create a design netlist without including my source design files? | Altera Community - 341619

https://docs.altera.com/r/docs/683247/25.1.1/quartus-prime-pro-edition-user-guide-block-based-design/answers-to-top-faqs

You can find training on block-based design here: https://learn.altera.com/learn/learning-plans/82/altera-quartus-prime-software-tools-features

The second method is to use IEEE 1735 encryption of the source files. You can find more information in the Quartus Prime Pro Edition User Guide Getting Started document at the following URL:

https://docs.altera.com/r/docs/683463/25.3/quartus-prime-pro-edition-user-guide-getting-started/support-for-the-ieee-1735-encryption-standard

I hope this helps!

shengn_altera · Answer

Hi,
Do you have any further concern on using the block based method or encryption?
For the question on HPS and Nios communication, please open a new thread to embedded queue category

gdoraisa · Answer

Thanks for responding. The design partition question is what I had in mind. Your links are helpful.&nbsp;&nbsp;&nbsp;

gdoraisa · Answer

I understand the read but is there an application note or tutorial that show how the block-based method done. Reading design partition from handbook is one thing. Practical video is more beneficial.

For the HPS to NIOS, I will open a new thread. Thanks.

Forum Discussion

Two different build merges as one

4 Replies

Recent Discussions

Generating RBF raw binary file on Max 10

Timing analysis - long combinational path

Two different build merges as one

CYCLONE IVE ODDR delay mismatch

Agilex 7 boot from config flash over JTAG