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"rising_edge type specified in Qualified Expression must match time type that is implied for expression by context"
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That is because you (and corestar) used "wait for". wait for expects a time expression, while rising_edge(clk) is a boolean expression based on a signal transition. You need to use "wait until", like in my example.
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"Process statement must contain only one wait statement"
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Thats because you have tried to compile the code in Quartus - the quartus simulator will only simulate synthesisable code, and my code was definitely not synthesisable, only for testbenches. You need to run it in an RTL simulator, like modeslim.
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