true dual port RAM

Is it undefined ('U') or unknown ('X')? if it is 'U' are you sure you're putting a clock and other signals in, or even run the testbench? if it is 'X', you have multiple drivers on the same signal (which is coming from an external source).

In Modelsim you need to write a test harness to actually simulate your design. you cannot simply simulate a single design file with no stimulus.

I also notice you only write to the read address registers when you set write-enable high, meaning if you havent done a write cycle then the read_registers will be set all 'U's, and then it will either read an undefined address in the array (and return U) or read address 0. Move the read address registers outside the write enable if-then-else blocks.