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Altera_Forum
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17 years ago

Trouble with state-machine

Hello, I'm trying to build a state-machine in AHDL using Quartus 2 v7.2. During compilation I get these messages: Warning (14130): Reduced register "..." with stuck clock port to stuck value ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

I don't see anything obviously wrong with this subdesign.

The errors indicate that one of your registers does not have a valid clock. Clearly, the clock has been connected to both registers in this subdesign. So, is this the top level of your compilation? If not, is it possible that the subdesign is not instantiated correctly from the higher level? Specifically, is it possible that Takt0 is driven by a constant value?