Forum Discussion
Altera_Forum
Honored Contributor
9 years agoHello Dave,
Thank you for your answer. --- Quote Start --- is the bit-error rate at each setting of delay step (x-axis) and offset/voltage (y-axis). --- Quote End --- I think this is the point I'm missing! I could see in your slides that you say: "The receiver has a phase-interpolator and voltage-offset generator" So it can actually offset the voltage in the receiver input? Now I think I get it. It shifts the phase and for each phase, it starts shifting the voltage-offset until you reach the target BER. Is that it? Is it made by the same block responsible for the Offset Cancellation? Is it actually how it calibrates for the best Offset? Thank you for you the clarifying answer and for sharing the documents! Cheers, Mauricio