Timing Violations workaround strategy

So the clock you're using for the input constraint is the clock you're sending out. I assume the clock goes out and data comes back in. So the -max and -min values would represent the max and min external roundtrip delay from clock going out to data coming back in. I would plug those values in, as they're going to be large and their variation will determine if this is possible. After that's done, you will probably have to change the phase-shift, and most likely will need a multicycle since the data will be coming back more than one clock cycle after it was sent. I am worried about min/max variatino being too large, but we'll see.