Forum Discussion
Altera_Forum
Honored Contributor
9 years agoTiming violations - TimeQuest vs. Compile results ?????
I am pretty new to working with TimeQuest and working out timing violation in a design. In our current design we seem to be having some timing issues so I started looking at the TimeQuest analyser. ...
Altera_Forum
Honored Contributor
9 years agoshmueld -
In your first post you said "First I constrained all my clocks ...". How many clocks do you have, and what are the relationships between them? If you have multiple clock domains where paths exist between them Timequest by default assumes that these paths need to be constrained, even if the clock domains are independent (i.e., any paths that exist are don't care). If that's the case then you need to explicitly tell Timequest to ignore paths between the clock domains that are independent. The most efficient way to do this with with the "set_clock_groups" constraint. If this is what's going on let us know and someone can post a "set_clock_groups" example for you. Bob