Honored ContributorI have problems to confirm my timing with Timequest Analyzer. I just constraint my base clock and try now to find out , the setup time and hold time from sdram_data in relation to the clk_sdram.
I always get the message: “Info: Report Timing: No setup paths were found” Do I have to constrain my design first before I can ask for reports?
Honored ContributorEverything in TimeQuest is constraint based. If you've constrained your clocks, then the internal timing is constrained, but you'll need to add set_input_delay and set_output_delay constraints to your I/O ports so they can be properly analyzed.
(You can use the report_path constraint, which analyzes paths without a constraint, which will work for now, but I recommend constraining everything so the reports are already done for you and so the fitter works to meet your constraints.)Honored ContributorThanks for your answer!
