Forum Discussion

CWarr1's avatar
CWarr1
Icon for New Contributor rankNew Contributor
5 years ago

Timing Analyzer Inter-Path-Competition in Nios sub-system

I am trying to close out timing in my Arria-10 FPGA design, using Quartus Prime V19.1.0 pro edition. I clicked on the link to "report timing closure recommendations" This opened Timing Analyzer whic...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


You may add the setting below in the qsf file to duplicate a register


set_instance_assignment -name DUPLICATE_REGISTER -to <register_name> <num_duplicates>


Thanks

Best regards,

KhaiY


  • CWarr1's avatar
    CWarr1
    Icon for New Contributor rankNew Contributor
    5 years ago

    Thanks.
    My QSF file has a message:

    # Altera recommends that you do not modify this file. This
    # file is updated automatically by the Quartus Prime software
    # and any changes you make may be lost or overwritten

    Is it OK to ignore this, or can I create a different QSF file?

    Regards