Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Timing Analysis Report

I have done a static timing analysis using TimeQuest Timing Analyzer for 100 MHz clock frequency for my design. I have got the following reports: Info (332140): No Setup paths to report I...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

--- Quote Start ---

Did you create a sdc file and add clock and include it into your quartus compile? Example:

create_clock -name "clkin" -period "100MHz" [ get_ports clk ]

If you have set the sdc file, you should get some figures on your setup/hold. +slack means meet and -ve slack means fail timing. Also you should be able to check your Fmax as well.

--- Quote End ---

Yes I have created a SDC file for 100MHz frequency. then I have got this results. I dint no why any setup and hold slack is not there at the result. Do you have any idea? Foradditional info I am using Quartus 13.0 web edition.