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Altera_Forum
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16 years ago

TimeQuest/SDC - How Do I Specify Constraints Relative to Output Clock

Hi I am just learning to use Quartus and TimeQuest, and am trying to figure out if it's possible to define a timing constraint relative to an output clock. I have data (d) clocked out by...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Chris,

Rysc wrote a brillant document on this exact issue.

If you google

"how to constraint source-synchronous double-data rate interfaces"

You will find it as a hit in the altera forum.

I am doing this same thing and posted a question a day ago about "extra timing paths in DDR". If you look at that my .sdc is attached

C