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A wild guess: your da and db ports are actually buses. If you want to apply constraint to the whole bus, try this:
set_input_delay -clock "sinclk" -max 18ns db
}]
set_input_delay -clock "sinclk" -min 2.000ns db
}]
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da and db are actually busses. Thanks for the
[*] suggestion. Previously I had manually enumerated each of the pins. Now I used
[*] but I still get an error:
Warning: Ignored set_input_delay at FpgaThird.sdc(40): Positional argument: object_list targets with value db
}] contains no input ports
Info: set_input_delay -clock "sinclk" -max 18ns db
}]
Warning: Ignored set_input_delay at FpgaThird.sdc(41): Positional argument: object_list targets with value db
}] contains no input ports
Info: set_input_delay -clock "sinclk" -min 2.000ns db
}]
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