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Altera_Forum
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12 years ago

TimeQuest Timing Analyzer[Setup slack analysis]

HI, I am trying to understand how the Time Quest analyzer calculating required setup and hold time.I have written code for register and the clocks are common(50 MHz). As per my understanding da...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Err.. "kind of".

In most, if not all, cell libraries for ASIC designs, the flip-flops have negative hold times.