Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi,
this often occures when you trigger a process with such signals. For example:
if (rising_edge(signal_load)) then
{do something}
end if;
In this case quartus will always recognize "signal_load" as a clock because rising_edge is only meant to use clocks. Check your design for edge detection on this signals and try to avoid the edge detection on asynchronous signals. For Example like this:
if (rising_edge(clock)) then
signal_load_old <= signal_load;
if ((signal_load_old = '0') and (signal_load = '1')) then
{do something}
end if;
end if;
This is only one method to catch the edges of a signal. There are sure some others (perhaps better).