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Nope.
That being said, what value would you set it to? For example, if you set it to 5ns, so you're saying the delay between those two points would fail if it were greater than 5ns. If the delay were 4ns it would make it, but the path is considerably different if it were 0ns of skew or -2ns of skew(i.e. the latter would actually fail).
My guess is that the clocks are asynchronous, and you don't have a hard requirement, and just want to throw something in to make sure the datapath isn't 200ns, or something like that, not that it would ever be. There isn't a way to do this, and in the end you just have to accept that it takes in clock skew, but since the requirement probably isn't too tight, it shouldn't be a problem. (Please set me straight if I'm missing something from your situation, I'm just describing what I've seen a lot of)
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Thanks for your reply.
To clarify the actual situation, I have two signals crossing clock domains, the first one being a data_enable pulse, the second, being the (latched) data itself. I delay the data_enable signal by a few (e.g. 2 or 3) clock cycles (in the orignal clock domain) to give enough time to the data to propagate through. I want to set the max delay for the data to be equal to the total delay of those (2 or 3) clock cycles (by which the data_enable is delayed). Both signals will be double flopped afterwards (in the destination clock domain).
Edit: I don't want to set a fixed value between the clock domains as I may use a different number of clock cycles as a delay (for different data_enable's) at different points in my design.
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